IC device having low resistance TSV comprising ground connection
US8436475B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2012 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Apr 11, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an integrated circuit (IC) die including a substrate, and a plurality of through substrate via (TSV) that extends through the substrate to a protruding integral tip and which is partially covered with a dielectric liner and partially exposed from the dielectric liner. A metal layer is on the bottom surface of the IC die physically connecting the plurality of TSVs and physically and electrically connected to connecting the first metal protruding tips of TSVs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.