Method and apparatus for saving power in an integrated circuit
US8436656B2 · kind B2 · utility
1Cited by
5References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2009 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Jan 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17784
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Some embodiments provide an integrated circuit (‘IC’) that includes at least first and second circuits operating at a first voltage. The IC includes, between the first and second circuits, a direct connection comprising a third circuit for transmitting a signal from the first circuit to the second circuit at a second voltage that is lower than the first voltage. At least one of the first and second circuits is a configurable circuit for configurably performing operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.