Patent · US Active

Word line driver cell layout for SRAM and other semiconductor devices

US8437166B1 · kind B1 · utility

7Cited by
11References
20Claims
0Family size

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Key dates

Filing dateNov 16, 2011
Grant dateMay 7, 2013
Priority date
Expiry dateNov 16, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/413
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A word line driver cell suitable for RAM devices such as SRAM, static random access memory devices, is provided. The word line driver cell is compatible with double pattern processing techniques and enables the formation of all word lines from a single metal layer which, in turn, enables overlying and underlying metal levels to be used for other features such as signal lines for word line decoders. A power mesh is formed using multiple metal layers and the formation of all the word lines from a single metal layer enables VDD and VSS power lines that are formed from an overlying layer to extend orthogonal to the cell direction and include wider widths reducing metal line resistance and increasing the deliverable power.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.