Static random access memory cell and method of operating the same
US8437178B2 · kind B2 · utility
6Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2011 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Sep 2, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory cell includes a latch unit. The latch unit includes a bi-inverting circuit and a switching circuit. The bi-inverting circuit has a first terminal and a second terminal. The switching circuit is electrically connected between the first terminal and the second terminal, wherein when the switching circuit is turned on, the switching circuit forms a feedback between the first terminal and the second terminal for latching the latch unit; and when the switching circuit is turned off, the feedback is removed to cause the SRAM cell to write a data bit to the latch unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.