Characterization of bits in a functional memory
US8437213B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2008 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Dec 31, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure provide an integrated circuit including a functional memory and methods of characterizing a component or a defect of a memory cell in the functional memory. In one embodiment, the functional memory includes row and column periphery units having periphery sourcing and sinking voltage supply ports, an array of memory cells organized in rows and columns and a word line controlled by a word line driver that provides row access to a memory cell of the array. Additionally, the functional memory also includes a bit line controlled by a direct bit line access circuit that provides direct bit line access to the memory cell through a bit line analog access port and an independent voltage supply port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.