Method for forming strained layer with high Ge content on substrate and semiconductor structure
US8440550B2 · kind B2 · utility
5Cited by
3References
4Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 29, 2010 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Nov 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/751
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure and a method for forming the same are provided. The semiconductor structure may comprise a substrate (110); an insulation layer (120) formed on the substrate (110); a strained layer (130) formed on the insulation layer (120); a strained layer (140) with high Ge content formed on the strained layer (130); and a gate stack (160) formed on the strained layer (140) with high Ge content.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.