Fin transistor structure and method of fabricating the same

US8441050B2 · kind B2 · utility

Assignee

• INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Zhijiong Luo · Poughkeepsie, US
• Huilong Zhu · Poughkeepsie, US
• Haizhou Yin · Poughkeepsie, US

Key dates

• Filing date: Mar 31, 2011
• Grant date: May 14, 2013
• Expiry date: Jun 14, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/024

Abstract

A fin transistor structure and a method of fabricating the same are disclosed. In one aspect the method comprises providing a bulk semiconductor substrate, patterning the semiconductor substrate to form a fin with it body directly tied to the semiconductor substrate, patterning the fin so that gaps are formed on the bottom of the fin at source/drain regions of the transistor structure to be formed. This is performed wherein a portion of the fin corresponding to the channel region of the transistor structure to be formed is directly tied to the semiconductor substrate, while other portions of the fin at the source/drain regions are separated from the surface of the semiconductor substrate by the gaps. Also, filling an insulation material into the gaps, and fabricating the transistor structure based on the semiconductor substrate with the fin formed thereon are disclosed. Thereby, it is possible to reduce the leakage current while maintaining the advantages of body-tied structures.