Method for writing in a MRAM-based memory device with reduced power consumption
US8441844B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2011 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Dec 8, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of writing in a memory device comprising a plurality of MRAM cells, each cell including a magnetic tunnel junction having a resistance that can be varied during a write operation when heated at a high threshold temperature; a plurality of word lines connecting cells along a row; and a plurality of bit lines connecting cells along a column; the method comprising supplying a bit line voltage to one of the bit lines and a word line voltage to one of the word lines for passing a heating current through the magnetic tunnel junction of a selected cell; said word line voltage is a word line overdrive voltage being higher than the core operating voltage of the cells such that the heating current has a magnitude that is high enough for heating the magnetic tunnel junction at the predetermined high threshold temperature. The memory device can be written with low power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.