Distributed memory usage for a system having multiple integrated circuits each including processors
US8443145B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2011 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Aug 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0757
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of integrated circuits in a system, each having a program memory loaded with different sections of a program, and a second memory. The integrated circuits perform the program, such that, when one of the integrated circuits requires a portion of the program, which is contained in its own program memory, it extracts it from the program memory and uses it, but when it requires a portion of the program, which is not contained in its own program memory, it reads it from the program memory of one of the other integrated circuits into its second memory and runs that portion of the program from there. In one example, the system is a line card, and the program is specific to one DSL protocol.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.