Patent · US Active

System-wide quiescence and per-thread transaction fence in a distributed caching agent

US8443148B2 · kind B2 · utility

0Cited by

0References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

James Vash · Littleton, US
Bongjin Jung · Westford, US
Rishan Tan · San Jose, US

Key dates

Filing date	Dec 26, 2010
Grant date	May 14, 2013
Priority date	—
Expiry date	Nov 17, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F12/0842
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Methods and apparatus relating to system-wide quiescence and per-thread transaction fence in a distributed caching agent are described. Some embodiments utilize messages, counters, and/or state machines that support system-wide quiescence and per-thread transaction fence flows. Other embodiments are also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.