Semiconductor device and method of manufacturing the same
US8445350B2 · kind B2 · utility
2Cited by
12References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 10, 2012 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Jan 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to an embodiment of a semiconductor device and a method of manufacturing the same, buried gates are formed in a semiconductor substrate including a cell region and a peripheral region, with the cell region and the peripheral region formed to have a step therebetween. Next, a spacer is formed in a region between the cell region and the peripheral region to block an oxidation path between a gate oxide layer and another insulating layer. Embodiments may reduce damage to active regions and prevent IDD failure because a gate pattern is formed on a guard region provided at a periphery of the cell region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.