Patent · US Active

Method for integrating MIM capacitor and thin film resistor in modular two layer metal process and corresponding device

US8445353B1 · kind B1 · utility

11Cited by
6References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 29, 2009
Grant dateMay 21, 2013
Priority date
Expiry dateApr 14, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/85
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for integrating a metal-insulator-metal (MIM) capacitor and a thin film resistor in an integrated circuit is provided that includes depositing a first metal layer outwardly of a semiconductor wafer substrate. A portion of the first metal layer forms a bottom plate for a MIM capacitor. A second metal layer is deposited outwardly of the first metal layer. A first portion of the second metal layer forms a top plate for the MIM capacitor and a second portion of the second metal layer forms contact pads for a thin film resistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.