Patent · US Active

Epitaxial silicon growth

US8445387B2 · kind B2 · utility

2Cited by

11References

13Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

David H. Wells · Boise, US
Du Li · Palo Alto, US

Key dates

Filing date	Mar 15, 2011
Grant date	May 21, 2013
Priority date	—
Expiry date	Mar 15, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH10D30/6211
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Memory cell structures, including PSOIs, NANDs, NORs, FinFETs, etc., and methods of fabrication have been described that include a method of epitaxial silicon growth. The method includes providing a silicon layer on a substrate. A dielectric layer is provided on the silicon layer. A trench is formed in the dielectric layer to expose the silicon layer, the trench having trench walls in the <100> direction. The method includes epitaxially growing silicon between trench walls formed in the dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.