Integrating diverse transistors on the same wafer

US8450199B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Fausto Piazza · Grenoble, FR
• Alfonso Maurelli · Vimercate, IT

Key dates

• Filing date: Dec 22, 2008
• Grant date: May 28, 2013
• Expiry date: Nov 29, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

Different types of transistors, such as memory cells, higher voltage, and higher performance transistors, may be formed on the same substrate. A transistor may be formed with a first polysilicon layer covered by a dielectric. A second polysilicon layer over the dielectric may be etched to form a sidewall spacer on the gate of the transistor. The sidewall spacer may be used to form sources and drains and to define sub-lithographic lightly doped drains. After removing the spacer, the underlying dielectric may protect the lightly doped drains.