Manufacturing methods of multilayer printed circuit board having stacked via
US8453322B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2009 |
| Grant date | Jun 4, 2013 |
| Priority date | — |
| Expiry date | Nov 5, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing at least a portion of a printed circuit board. The circuit board is formed to include a plurality of sub-assemblies, each of the sub-assemblies including a plurality of circuit layers and having at least one countersink and at least one hole, the countersink having a first diameter and a first depth from a first side of at least one of the sub-assemblies and into the at least one sub-assembly, the hole having a second diameter smaller than the first diameter and a second depth longer than the first depth from the first side of the at least one sub-assembly and into the at least one sub-assembly at the countersink; a metal metalized within the hole and the countersink; a lamination adhesive interposed between one and a corresponding one of the sub-assemblies and having at least one via formed therethrough; and a counter paste filled within the via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.