Trench capacitor with spacer-less fabrication process
US8455327B2 · kind B2 · utility
1Cited by
4References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2011 |
| Grant date | Jun 4, 2013 |
| Priority date | — |
| Expiry date | Aug 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A trench capacitor and method of fabrication are disclosed. The SOI region is doped such that a selective isotropic etch used for trench widening does not cause appreciable pullback of the SOI region, and no spacers are needed in the upper portion of the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.