Multiple seal ring structure
US8461021B2 · kind B2 · utility
13Cited by
3References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2012 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Dec 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a method of fabricating a semiconductor device, the method including providing a substrate having a seal ring region and a circuit region, forming a first seal ring structure over the seal ring region, forming a second seal ring structure over the seal ring region and adjacent to the first seal ring structure, and forming a first passivation layer disposed over the first and second seal ring structures. A semiconductor device fabricated by such a method is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.