Negative voltage level shifter circuit
US8461899B2 · kind B2 · utility
7Cited by
5References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 29, 2011 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Sep 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356165
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A negative voltage level shifter circuit includes a pair of input transistors, a gate of each input transistor being driven by one of an input signal and an inverted version of the input signal, a cascode sub-circuit coupled to the pair of input transistors, and a pair of cross-coupled transistors for locking a state of the voltage level shifter depending on the input signal, wherein respective gates of the cross-coupled transistors are driven by outputs of respective comparator sub-circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.