Serial interface devices, systems and methods
US8464145B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2010 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Jul 18, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A serial interface device includes multiple serial link connections that receive at least address values and at least one error detection code (EDC) on different serial link connections, the EDC generated from at least the address values, the serial link connections for the address values and EDC operated separately from one another; and multiple output serial links, at least a first one of the output serial links outputting data values read from memory locations corresponding to the address values, and at least a second one of the output serial links different from and operated separately from the first one outputting EDC values generated for the data values read from the memory locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.