Bulk FinFET and SOI FinFET hybrid technology

US8466012B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Josephine B. Chang · Mahopac, US
• Leland Chang · New York, US
• Chung-Hsun Lin · White Plains, US
• Jeffrey W. Sleight · Ridgefield, US

Key dates

• Filing date: Feb 1, 2012
• Grant date: Jun 18, 2013
• Expiry date: Feb 1, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D87/00

Abstract

Hybrid bulk finFET and SOI finFET devices and methods for fabrication thereof are provided. In one aspect, a method for fabricating a CMOS circuit having SOI finFET and bulk finFET devices includes the following steps. A wafer is provided having an active layer separated from a substrate by a BOX. Portions of the active layer and BOX are removed in a second region of the wafer so as to expose the substrate. An epitaxial material is grown in the second region of the wafer templated from the substrate. Fins are etched in the active layer and in the epitaxial material using fin lithography hardmasks. Gate stacks are formed covering portions of the fins which serve as channel regions of the SOI finFET/bulk finFET devices. An epitaxial material is grown on exposed portions of the fins which serves as source and drain regions of the SOI finFET/bulk finFET devices.