Patent · US Active

Semiconductor device including excess solder

US8466548B2 · kind B2 · utility

3Cited by

5References

25Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Reinhold Bayerer · Warstein, DE
Niels Oeschler · Arnsberg, DE
Alexander Ciliox · Greiffenberg, DE

Key dates

Filing date	May 31, 2011
Grant date	Jun 18, 2013
Priority date	—
Expiry date	May 31, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a substrate including a first metal layer, a first semiconductor chip having sidewalls, and a first solder layer contacting the first semiconductor chip and the first metal layer. The first metal layer includes a groove extending around sidewalls of the first semiconductor chip. The groove is at least partly filled with excess solder from the first solder layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.