Patent · US Active

Clock generator

US8466723B2 · kind B2 · utility

4Cited by

7References

15Claims

0Family size

Assignee

SYNOPSYS, INC. · US

Inventors

Peter Klapproth · Wulfen, DE
Greg Ehmann · Sleepy Hollow, US
Neal T. Wingen · Algonquin, US

Key dates

Filing date	Sep 25, 2008
Grant date	Jun 18, 2013
Priority date	—
Expiry date	May 8, 2029

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A data processing system comprises a plurality of sub-circuits, a clock generator provided with a control circuit, a pool of oscillator circuits comprising at least three oscillator circuits, and a multiplexing circuit coupled between the pool and clock inputs of the sub-circuits. The multiplexing circuit has a control input coupled to a control output of the control circuit. The multiplexing circuit is configured to couple any selectable one of the oscillator circuits in the pool to a clock input of each of the sub-circuits. The control circuit is configured to set the frequencies of respective ones of the clock circuit by controlling the multiplexing circuit to supply clock signals derived from selected ones of the oscillator circuits to the sub-circuits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.