Fan-out wafer level package for an optical sensor and method of manufacture thereof
US8466997B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2009 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Apr 18, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
An optical sensor package has a transparent substrate with a redistribution layer formed on a face thereof, which includes a window and a plurality of electrically conductive traces. A semiconductor substrate, including an optical sensor and a plurality of contact terminals on a face thereof, is positioned on the transparent substrate in a face-to-face arrangement, with the optical sensor directly opposite the window, and with each of the contact terminals electrically coupled to a respective one of the electrically conductive terminals. The transparent substrate has larger overall dimensions than the semiconductor substrate, so that one or more edges of the transparent substrate extend beyond the corresponding edges of the semiconductor substrate. A plurality of solder balls are positioned on the face of the transparent substrate, each in electrical contact with a respective one of the electrically conductive terminals. The solder balls and the semiconductor substrate are at least partially encapsulated in an encapsulating layer formed on the face of the transparent substrate, which has been planarized to expose upper portions of the solder balls, as contact pads of the optical se…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.