Semiconductor device
US8467217B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2011 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Jul 8, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The semiconductor device comprises first and second memory cells, first and second bit lines connected to the first/second memory cells, first and second amplifiers connected to the second bit line, a local input/output line commonly connected to the first/second amplifiers, first and second local column switches connected between the first/second amplifiers and the local input/output line, a second local column switch connected between the second amplifier and the local input/output line, a column select line, a first global column switch connected between the column select line and the first local column switch and controlling a connection therebetween in response to a first select signal, and a second global column switch connected between the column select line and the second local column switch and controlling a connection therebetween in response to a first select signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.