Methods of automatically placing and routing for timing improvement
US8468488B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 31, 2011 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Sep 2, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and software for methods and software for placing and routing a signal path in an integrated circuit layout are disclosed. The signal path generally includes a plurality of cells and combinational paths having at least one net between said cells. The method includes determining whether an adjacent cell can be swapped with a selected cell (e.g., where the selected cell is one of the cells of the signal path and the adjacent cell is adjacent to the selected cell in the layout), determining whether a delay of the signal path decreases after swapping positions of the adjacent cell and the selected cell, and determining whether swapping the adjacent and selected cells causes a timing violation in another signal path of the layout. The present invention advantageously provides an automated method of improving the timing characteristics of poorly performing signal paths, without causing timing violations in other signal paths in the same integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.