In-situ carbon doped e-SiGeCB stack for MOS transistor

US8471307B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Rajesh Khamankar · Coppell, US
• Haowen Bu · Plano, US
• Douglas T. Grider · McKinney, US

Key dates

• Filing date: Jun 11, 2009
• Grant date: Jun 25, 2013
• Expiry date: Dec 2, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

An integrated circuit containing a PMOS transistor with p-channel source/drain (PSD) regions which include a three layer PSD stack containing Si—Ge, carbon and boron. The first PSD layer is Si—Ge and includes carbon at a density between 5×1019 and 2×1020 atoms/cm3. The second PSD layer is Si—Ge and includes carbon at a density between 5×1019 atoms/cm3 and 2×1020 atoms/cm3 and boron at a density above 5×1019 atoms/cm3. The third PSD layer is silicon or Si—Ge, includes boron at a density above 5×1019 atoms/cm3 and is substantially free of carbon. After formation of the three layer epitaxial stack, the first PSD layer has a boron density less than 10 percent of the boron density in the second PSD layer. A process for forming an integrated circuit containing a PMOS transistor with a three layer PSD stack in PSD recesses.