Inventor · McKinney, TX, US

Douglas T. Grider

51Patents
16h-index
47Co-inventors
84Inventor score

Filing activity: Apr 27, 1990 → Mar 19, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US6136654A Method of forming thin silicon nitride or silicon oxynitride gate dielectrics Electricity 127 Expired
US5242847A Selective deposition of doped silion-germanium alloy on semiconductor substrate Emerging Cross-Sectional Technologies 113 Expired
US5089872A Selective germanium deposition on silicon and resulting structures Electricity 76 Expired
US6699763B2 Disposable spacer technology for reduced cost CMOS processing Electricity 63 Expired
US6030874A Doped polysilicon to retard boron diffusion into and through thin gate dielectrics Electricity 57 Expired
US6632718B1 Disposable spacer technology for reduced cost CMOS processing Electricity 46 Expired
US5336903A Selective deposition of doped silicon-germanium alloy on semiconductor substrate, and resulting structures Emerging Cross-Sectional Technologies 40 Expired
US6632747B2 Method of ammonia annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile Electricity 38 Expired
US5646073A Process for selective deposition of polysilicon over single crystal silicon substrate and resulting product Emerging Cross-Sectional Technologies 36 Expired
US6503846B1 Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates Electricity 31 Expired
US6548366B2 Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile Electricity 30 Expired
US5818100A Product resulting from selective deposition of polysilicon over single crystal silicon substrate Emerging Cross-Sectional Technologies 29 Expired
US5585286A Implantation of a semiconductor substrate with controlled amount of noble gas ions to reduce channeling and/or diffusion of a boron dopant subsequently implanted into the substrate to form P- LDD region of a PMOS device Electricity 27 Expired
US6737333B2 Semiconductor device isolation structure and method of forming Electricity 26 Expired
US6326281A Integrated circuit isolation Electricity 20 Expired
US6093659A Selective area halogen doping to achieve dual gate oxide thickness on a wafer Electricity 16 Expired
US5162246A Selective germanium deposition on silicon and resulting structures Electricity 16 Expired
US6063670A Gate fabrication processes for split-gate transistors Emerging Cross-Sectional Technologies 13 Expired
US7226834B2 PMD liner nitride films and fabrication methods for improved NMOS performance Emerging Cross-Sectional Technologies 13 Expired
US6933248B2 Method for transistor gate dielectric layer with uniform nitrogen concentration Electricity 7 Expired
US7244654B2 Drive current improvement from recessed SiGe incorporation close to gate Electricity 5 Expired
US5717238A Substrate with controlled amount of noble gas ions to reduce channeling and/or diffusion of a boron dopant forming P-LDD region of a PMOS device Electricity 5 Expired
US7560792B2 Reliable high voltage gate dielectric layers using a dual nitridation process Electricity 4 Active
US8471307B2 In-situ carbon doped e-SiGeCB stack for MOS transistor Electricity 4 Active
US6709938B2 Source/drain extension fabrication process with direct implantation Electricity 3 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.