Method and apparatus for reducing plasma process induced damage in integrated circuits
US8471369B1 · kind B1 · utility
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3References
4Claims
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Key dates
| Filing date | Aug 5, 2004 |
| Grant date | Jun 25, 2013 |
| Priority date | — |
| Expiry date | Mar 22, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An insulating material interposed between two conductive materials can experience plasma process induced damage (PPID) when a plasma process is used to deposit a dielectric onto one of the conductive materials. This PPID can be reduced by reducing electric charge accumulation on the one conductive material during the plasma process dielectric deposition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.