Multi-resource aware partitioning for integrated circuits
US8473881B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2011 |
| Grant date | Jun 25, 2013 |
| Priority date | — |
| Expiry date | Sep 30, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of partitioning a circuit design can include identifying a circuit design in which components of the circuit design are assigned to each of a plurality of regions, wherein each region corresponds to a physical portion of an integrated circuit. A maximum oversubscription region can be determined for a selected component type from the plurality of regions. A target region from the plurality of regions can be selected that is adjacent to the region of maximum oversubscription. The method also can include re-assigning, by a processor, a selected number of components of the maximum oversubscription region to the target region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.