Debugging mechanisms in a cache-based memory isolation system

US8473921B2 · kind B2 · utility

Assignee

• Microsoft Corporation · US

Inventors

• Martin Taillefer · Redmond, US
• Ali-Reza Adl-Tabatabai · Santa Clara, US
• Gad Sheaffer · Haifa, IL
• Peter Lachner · Heroldstatt, DE
• Richard Wurdack · Seattle, US
• Darek Mihocka · Mercer Island, US
• Jan Gray · Bellevue, US

Key dates

• Filing date: Dec 23, 2009
• Grant date: Jun 25, 2013
• Expiry date: Feb 26, 2032

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F12/0817
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Debugging software in systems with architecturally significant processor caches. A method may be practiced in a computing environment. The method includes acts for debugging a software application, wherein the software application is configured to use one or more architecturally significant processor caches coupled to a processor. The method includes beginning execution of the software application. A debugger is run while executing the software application. The software application causes at least one of reads or writes to be made to the cache in an architecturally significant fashion. The reads or writes made to the cache in an architecturally significant fashion are preserved while performing debugging operations that would ordinarily disturb the reads or writes made to the cache in an architecturally significant fashion.