Apparatus and methods for forming through vias
US8476770B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2011 |
| Grant date | Jul 2, 2013 |
| Priority date | — |
| Expiry date | Jul 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for forming through vias in an integrated circuit package are disclosed. An apparatus is disclosed, having a substrate having one or more bond pad terminals for receiving electrical connections on at least one surface; an encapsulation layer covering the at least one surface of the substrate and having a first thickness; a plurality of through vias extending through the encapsulation layer and positioned in correspondence with at least one of the one or more bond pad terminals; conductor material disposed within the plurality of through vias to form electrical connectors within the plurality of through vias; and at least one external terminal disposed on a surface of the encapsulation layer, electrically coupled to one of the one or more bond pad terminals by an electrical connector in at least one of the plurality of through vias. Package arrangements and methods for the through vias are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.