Inventor · Hsinchu, TW

Chih-Hang Tung

82Patents
9h-index
52Co-inventors
77Inventor score

Filing activity: Jan 6, 2010 → Jan 4, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US8754514B2 Multi-chip wafer level package Electricity 85 Active
US8531032B2 Thermally enhanced structure for multi-chip device Electricity 64 Active
US8476770B2 Apparatus and methods for forming through vias Electricity 55 Active
US10290611B2 Semiconductor packages and methods of forming same Electricity 41 Active
US9082763B2 Joint structure for substrates and methods of forming Electricity 36 Active
US9679882B2 Method of multi-chip wafer level packaging Electricity 17 Active
US11996351B2 Packaged semiconductor device including liquid-cooled lid and methods of forming the same Electricity 15 Active
US11387164B2 Semiconductor device and manufacturing method thereof Electricity 14 Active
US9293437B2 Functional block stacked 3DIC and method of making same Electricity 13 Active
US9054194B2 Non-planar transistors and methods of fabrication thereof Electricity 9 Active
US9159686B2 Crack stopper on under-bump metallization layer Electricity 8 Active
US9136143B2 Thermally enhanced structure for multi-chip device Electricity 8 Active
US9455183B2 Semiconductor device and bump formation process Electricity 7 Active
US9576929B1 Multi-strike process for bonding Electricity 7 Active
US9564420B2 Functional block stacked 3DIC and method of making same Electricity 7 Active
US10460987B2 Semiconductor package device with integrated antenna and manufacturing method thereof Electricity 6 Active
US8685798B2 Methods for forming through vias Electricity 5 Active
US11581281B2 Packaged semiconductor device and method of forming thereof Electricity 5 Active
US9997467B2 Semiconductor packages and methods of forming the same Electricity 4 Active
US10319690B2 Semiconductor structure and manufacturing method thereof Electricity 4 Active
US9472524B2 Copper-containing layer on under-bump metallization layer Electricity 4 Active
US10923417B2 Integrated fan-out package with 3D magnetic core inductor Electricity 3 Active
US8803333B2 Three-dimensional chip stack and method of forming the same Electricity 3 Active
US10734279B2 Semiconductor package device with integrated antenna and manufacturing method thereof Electricity 3 Active
US9343436B2 Stacked package and method of manufacturing the same Electricity 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.