Integrated circuit packaging system with embedded interconnect and method of manufacture thereof
US8476775B2 · kind B2 · utility
2Cited by
13References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2009 |
| Grant date | Jul 2, 2013 |
| Priority date | — |
| Expiry date | Dec 29, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit with an adhesive attached thereto; connecting the integrated circuit and a plated interconnect pad; attaching an embedded interconnect to the plated interconnect pad; and forming an encapsulation, having an encapsulation first side and an encapsulation second side, around the integrated circuit, the embedded interconnect, and the plated interconnect pad with the embedded interconnect exposed from the encapsulation second side and the plated interconnect pad and the adhesive exposed from the encapsulation second side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.