Highly flexible fractional N frequency synthesizer

US8477898B2 · kind B2 · utility

Assignee

• SYNOPSYS, INC. · US

Inventors

• James P. Flynn · Beaverton, US
• Richard H. Steeves · Portland, US
• John T. Stonick · Portland, US
• Daniel K. Weinlader · Allentown, US
• Jianping Wen · Beaverton, US
• Skye Wolfer · Hillsboro, US
• David A. Yokoyama-Martin · Portland, US
• Dino A. Toffolon · Stoney Creek, CA
• Jasjeet Singh · Brampton, CA

Key dates

• Filing date: Jun 21, 2010
• Grant date: Jul 2, 2013
• Expiry date: Apr 24, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L7/081
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

One embodiment of the present invention provides a phase-locked loop (PLL) for synthesizing a fractional frequency. The PLL can include a 1/N frequency divider, a voltage-controlled oscillator (VCO), a programmable phase mixer, and a phase detector. The programmable phase mixer can be coupled between an output of the VCO and an input of the frequency divider, wherein the programmable phase mixer is configured to receive the output clock signal from the VCO and generate a first clock signal of frequency f1 by varying a phase of the output clock signal. The frequency divider is configured to receive the first clock signal from the programmable phase mixer and generate a second clock signal of frequency f2=f1/N. The phase detector can receive a reference clock signal and the second clock signal as inputs, and the phase detector's output can be used to generate the control voltage for the VCO.