Method for fabricating through-silicon via structure
US8481425B2 · kind B2 · utility
1Cited by
60References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 16, 2011 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Sep 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76831
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating through-silicon via structure is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a through-silicon via in the semiconductor substrate; covering a liner in the through-silicon via; performing a baking process on the liner; forming a barrier layer on the liner; and forming a through-silicon via electrode in the through-silicon via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.