Integrated circuit including FINFETs and methods for forming the same
US8482073B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2010 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Aug 23, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
An integrated circuit including a plurality of Fin field effect transistors (FINFETs) is provided. The integrated circuit includes a plurality of fin-channel bodies over a substrate. The fin-channel bodies include a first fin-channel body and a second fin-channel body. A gate structure is disposed over the fin-channel bodies. At least one first source/drain (S/D) region of a first FINFET is adjacent the first fin-channel body. At least one second source/drain (S/D) region of a second FINFET is adjacent the second fin-channel body. The at least one first S/D region is electrically coupled with the at least one second S/D region. The at least one first and second S/D regions are substantially free from including any fin structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.