Global and local counts for efficient memory page pinning in a multiprocessor system
US8484420B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2010 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Jan 3, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosure relate to the management of memory pages available for pin operations by groups of processors in a multiprocessor system to reduce cache contention and improve system performance. An exemplary embodiment comprises a system that may include interconnected processors, a global count of the number of pages available for pinning, and a plurality of local counts of pages available for pinning by groups of processors. Each local count may be in proximity to a processor group and include a subset of the pages allocated from the global count that are available for pinning by processors in the group. The local counts are adjusted accordingly in response to page pinning and unpinning by processors in the respective processor groups.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.