Method for thinning and dicing electronic circuit wafers
US8486763B2 · kind B2 · utility
2Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2011 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Dec 7, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T83/929
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for thinning and dicing a wafer of electronic circuits, wherein: a thinning step is carried out while the wafer is supported by a first film bonded at the periphery of a support frame; and a dicing step is carried out while the thinned wafer is supported by a second film bonded at the periphery of the same frame from the other surface of the wafer, the first film being unstuck only once the second one is in place.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.