Method of fabricating semiconductor device
US8486787B2 · kind B2 · utility
1Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2011 |
| Grant date | Jul 16, 2013 |
| Priority date | — |
| Expiry date | Jan 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes forming a first contact opening having a relatively larger depth than a second contact opening to expose first and second contacts through an insulation layer, where the first and second contacts are located at different depths with respect to an upper surface of the insulation layer. Therefore, it is possible to prevent excessive over-etch of the second contact opening and minimize etching damage to the contact region exposed by the second contact opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.