Vertical MOSFET transistor having source/drain contacts disposed on the same side and method for manufacturing the same

US8487371B2 · kind B2 · utility

Assignee

• FAIRCHILD SEMICONDUCTOR CORPORATION · US

Inventors

• Daniel M. Kinzer · El Segundo, US
• Steven Sapp · Felton, US
• Chung-Lin Wu · Hsinchu, TW
• Oseob Jeon · Seoul, KR
• Bigildis Dosdos · San Jose, US

Key dates

• Filing date: Mar 29, 2011
• Grant date: Jul 16, 2013
• Expiry date: Mar 29, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/13091
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Systems and methods of fabricating Wafer Level Chip Scale Packaging (WLCSP) devices with transistors having source, drain and gate contacts on one side of the transistor while still having excellent electrical performance with low drain-to-source resistance RDS(on) include using a two-metal drain contact technique. The RDS(on) is further improved by using a through-silicon-via (TSV) technique to form a drain contact or by using a copper layer closely connected to the drain drift.