Methods of manufacturing flash memory devices by selective removal of nitrogen atoms
US8492223B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2011 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Sep 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76826
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a flash memory device includes: forming a dielectric layer on an active region of a substrate having an isolation region and the active region; forming a floating gate on the dielectric layer; forming an isolation layer in the isolation region; forming a nitride layer including a first nitride layer portion formed on an exposed surface of the floating gate and a second nitride layer portion formed on an exposed surface of the isolation layer; selectively removing nitrogen atoms from the second nitride layer portion of the nitride layer; forming an inter-gate dielectric layer on both the first nitride layer portion and the isolation layer; and forming a control gate on the inter-gate dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.