Patent · US Active

Field effect transistor devices having thick gate dielectric layers and thin gate dielectric layers

US8492228B1 · kind B1 · utility

61Cited by
13References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 12, 2012
Grant dateJul 23, 2013
Priority date
Expiry dateJul 12, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/0158

Abstract

A method includes forming a first gate stack over a portion of a fin, forming a dummy gate stack over the fin, growing an epitaxial material from exposed portions of the fin, forming a layer of dielectric material over the epitaxial material, the first gate stack, and the dummy gate stack, performing a planarizing process that removes portions of the layer of dielectric material, the first gate stack, and the dummy gate stack, pattering a first mask over portions of the layer of dielectric material and the dummy gate stack, forming a silicide material on exposed portions of the first gate stack, removing the first mask, pattering a second mask over portions of the layer of dielectric material and the first gate stack, removing a polysilicon portion of the dummy gate stack to define a cavity, removing the second mask, and forming a second gate stack in the cavity.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.