Method and apparatus for preventing circuit failure
US8493075B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2010 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Jan 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00369
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An embedded decoupling capacitor wearout monitor for power transmission line, which can be integrated and fabricated in any standard CMOS or BiCMOS circuits. The embedded noise monitor is employed to detect the degraded capacitor and disable it from further operation, which will extend the operation lifetime of the circuit system and prevent subsequent catastrophic failure as a result of hard-breakdown (or capacitor short). In one aspect, the monitor circuit and method detects early degradation signal before catastrophic decoupling capacitor failure and, further can pin-point a degraded decoupling capacitor and disable it, avoiding impact from decoupling capacitor breakdown failure. The monitor circuit and method provides for decoupling capacitor redundancy and includes an embedded and self-diagnostic circuit for functionality and reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.