Method and apparatus for interfacing with heterogeneous dual in-line memory modules
US8495330B2 · kind B2 · utility
6Cited by
4References
24Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 2, 2010 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Nov 22, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1694
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described herein is a method and apparatus to interface a processor with a heterogeneous dual in-line memory module (DIMM). The method comprises determining an identity of a DIMM having data lanes; mapping the data lanes based on the determining of the identity of the DIMM; training input-output (I/O) transceivers in response to the mapping of the data lanes; and transferring data to and from the DIMM after training the I/O transceivers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.