Computing apparatus and method of handling interrupt
US8495345B2 · kind B2 · utility
1Cited by
1References
11Claims
0Family size
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Key dates
| Filing date | Dec 16, 2009 |
| Grant date | Jul 23, 2013 |
| Priority date | — |
| Expiry date | Apr 26, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing apparatus and method of handling an interrupt are provided. The computing apparatus includes a coarse-grained array, a host processor, and an interrupt supervisor. When an interrupt occurs in the coarse-grained array while performing a loop operation, the host processor processes the interrupt, and the interrupt supervisor may perform mode switching between the coarse-grained array and the host processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.