Shallow trench isolation chemical mechanical planarization

US8497210B2 · kind B2 · utility

Assignees

• International Business Machines Corporation · US
• JRS CORPORATION · JP

Inventors

• Leslie M. Charns · Portland, US
• Jason E. Cummings · Smithfield, US
• Lukasz J. Hupka · Salt Lake City, US
• Dinesh R. Koli · Tarrytown, US
• Tomohisa Konno · Tokyo, JP
• Mahadevaiyer Krishnan · Hopewell Junction, US
• Michael F. Lofaro · Milton, US
• Jakub W. Nalaskowski · Aurora, US
• Masahiro Noda · Yokohama, JP
• Dinesh Kumar Penigalapati · Guilderland, US
• Tatsuya Yamanaka · Somalomo, CM

Key dates

• Filing date: Jan 24, 2011
• Grant date: Jul 30, 2013
• Expiry date: Jun 10, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/691
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A polishing method includes polishing, in a first polish, a wafer to remove overburden and planarize a top layer leaving a portion remaining on an underlying layer. A second polishing step includes two phases. In a first phase, the top layer is removed and the underlying layer is exposed, with a top layer to underlying layer selectivity of between about 1:1 to about 2:1 to provide a planar topography. In a second phase, residual portions of the top layer are removed from a top of the underlying layer to ensure complete exposure of an underlying layer surface.