Method, apparatus, and manufacture for flash memory write algorithm for fast bits
US8498162B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2011 |
| Grant date | Jul 30, 2013 |
| Priority date | — |
| Expiry date | Oct 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus, and manufacture for a memory device is provided. The memory device includes memory cells that each store two bits, and a memory controller. During write operations, for each bit in each memory cell that is to be programmed, the memory controller determines whether both bits of the memory cell are being programmed. While controlling an application of programming pulses to the memory cell to program the bit, if both bits of the memory cell are being programmed, the memory controller causes the application of each programming pulse to the bit to occur for a reduced duration. Otherwise, the memory controller causes the application of each programming pulse to the bit to occur for a standard duration. The reduced duration is less than three-fourths of the standard duration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.