CMOS image sensor and method for forming the same
US8502389B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2011 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Aug 8, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit structure includes an interconnect structure that includes a plurality of metal layers, wherein the interconnect structure is under a semiconductor substrate. A metal pad is formed in one of the plurality of metal layers. A dielectric pad extends from a bottom surface of the semiconductor substrate up into the semiconductor substrate. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate and the dielectric pad. An edge of the semiconductor substrate in the opening is vertically aligned to an edge of the dielectric pad in the opening. The opening stops on a top surface of the metal pad. A dielectric spacer is disposed in the opening, wherein the dielectric spacer is formed on the edge of the semiconductor substrate and the edge of the dielectric pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.