Storing dynamically sized buffers within a cache
US8504773B1 · kind B1 · utility
8Cited by
8References
20Claims
0Family size
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Key dates
| Filing date | Dec 2, 2008 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Nov 18, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for buffering intermediate data in a processing pipeline architecture stores the intermediate data in a shared cache that is coupled between one or more pipeline processing units and an external memory. The shared cache provides storage that is used by multiple pipeline processing units. The storage capacity of the shared cache is dynamically allocated to the different pipeline processing units as needed, to avoid stalling the upstream units, thereby improving overall system throughput.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.