Fabrication of replacement metal gate devices
US8507383B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 25, 2011 |
| Grant date | Aug 13, 2013 |
| Priority date | — |
| Expiry date | Oct 13, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for polishing multiple dielectric layers to form replacement metal gate structures include a first chemical mechanical polish step to remove overburden and planarize a top layer to leave a planarized thickness over a gate structure. A second chemical mechanical polish step includes removal of the thickness to expose an underlying covered surface of a dielectric of the gate structure with a slurry configured to polish the top layer and the underlying covered surface substantially equally to accomplish a planar topography. A third chemical mechanical polish step is employed to remove the dielectric of the gate structure and expose a gate conductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.